7.1
STM-1 Frame structure is defined by 9x270 Matrix, each point of
the Matrix is a byte (8 bits).
Show that STM-1 will carry 155.52 Mbps.
| Data rate |
= |
[(9*270)*8]/125*10-6 |
| |
= |
155.52Mbits/s |
7.2
The following shows the STM-1 frame. Explain the importance of each
area shown.
1 – RSOH: carries overhead information
for the management of regenerator section
2 – AU Pointer: Used as the VC-4 pointer
3 - MSOH: carries overhead information for the management of multiplexer
section
4 - Payload: Contains actual user information
7.3
SDH will use the following 3 processes.
v. Mapping
vi. Aligning
vii. Multiplexing
Briefly explain the applications of above when a PDH 2.048 Mbps,
34.368 Mbps, 139.264
Mbps is converted to STM-1. Draw the relevant diagram.
Mapping –
process where a container is converted to a virtual container by
adding a POH
byte
Aligning
– Process of assembling a VC into a tributary unit where a
pointer is added to point
to the position of the first byte of the VC
Multiplexing
– Process where a TUG/AU is formed by TUs by byte interleaving
7.4
Draw the SDH multiplexing hierarchy from STM-1 to STM-256 and show
the basic information of 1 bit is shrink from 6.4 ns to 25 ps when
the multiplexing is achieved up to STM-256. Clearly show the bit
speed of each SDH hierarchy.
STM-1 ------ STM-4 ------- STM-16 --------
STM-64 ------- STM-256
| Time
duration for 1 byte in STM-1 |
= |
1/155.52*106
= 6.4ns |
| Time
duration for 1 byte in STM-4 |
= |
1.61ns |
| Time
duration for 1 byte in STM-16 |
= |
0.4ns |
| Time
duration for 1 byte in STM-64 |
= |
0.1ns |
| Time
duration for 1 byte in STM-256 |
= |
0.025ns
= 25ps |
Bit speeds:
STM-1 155.52Mbit/s ~ 155 Mbits/s
STM-4 622.08Mbit/s ~ 622 Mbits/s
STM-16 2.488Gbit/s ~ 2.5 Gbits/s
STM-64 9.953Gbit/s ~ 10 Gbits/s
STM-256 39.8Gbit/s ~ 40 Gbits/s
|
